That makes more sense ... though I would try to use one the CPUs, much more flexible in this regard.or because this is some kind of ROM or RAM "emulator" where a PIO state machine fields bus requests from an external processor to load and store data in the buffer. Power of two alignment allows a PIO state machine to efficiently add the buffer offset to the address.
Statistics: Posted by gmx — Wed Oct 16, 2024 6:21 pm